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bcm ? bus converter rev 1.3 vicorpower.com page 1 of 23 05/2015 800 927.9474 bcm ? bus converter fixed ratio dc-dc converter bcm400y500x1k8a31 features ? up to 1750 w continuous output power ? 2735 w/in 3 power density ? 98.0 % peak efficiency ? 4242 vdc isolation ? parallel operation for multi-kw arrays ? ov, oc, uv, short circuit and thermal protection ? 6123 through-hole chip package n 2.494 ? x 0.898 ? x 0.286 ? ( 63.34 mm x 22.80 mm x 7.26 mm) ? pmbus tm management interface* typical applications ? 380 dc power distribution ? high end computing systems ? automated test equipment ? industrial systems ? high density power supplies ? communications systems ? transportation product description the vi chip ? bus converter (bcm) is a high efficiency sine amplitude converter (sac), operating from a 260 to 410 vdc primary bus to deliver an isolated ratiometric output from 32.5 to 51.3 vdc. the bcm400y500x1k8a31 offers low noise, fast transient response, and industry leading efficiency and power density. in addition, it provides an ac impedance beyond the bandwidth of most downstream regulators, allowing input capacitance normally located at the input of a pol regulator to be located at the input of the bcm module. with a k factor of 1/8 , that capacitance value can be reduced by a factor of 64 x, resulting in savings of board area, material and total system cost. the bcm400y500x1k8a31 , combined with the d44tl1a0 digital supervisor and i13tl1a0 digital isolator, provide a secondary referenced pmbus? compatible telemetry and control interface. this interface provides access to the bcms internal controller con?guration, fault monitoring, and other telemetry functions. leveraging the thermal and density bene?ts of vicors chip packaging technology, the bcm module offers ?exible thermal management options with very low top and bottom side thermal impedances. thermally-adept chip-based power components, enable customers to achieve low cost power system solutions with previously unattainable system size, weight and efficiency attributes, quickly and predictably. product ratings v in = 400 v ( 260 ? 410 v) p out = up to 1750 w v out = 50 v ( 32.5 ? 51.3 v) ( no load ) k = 1/8 * when used with d44tl1a0 and i13tl1a0 chipset c us s nrtl cus
bcm ? bus converter rev 1.3 vicorpower.com page 2 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 typical application bcm400y500x1k8a31 + prm + vtm, remote sense configuration bcm400y500x1k8a31 + prm + vtm, adaptive loop configuration external current sense sgnd sgnd voltage reference with soft start voltage sense and error amplifier (differential) vtm start up pulse sgnd in out gnd v + vout Cin +in v C prm enable trim share/ control node al ifb vc vt vaux ref/ ref_en +in Cin +out Cout prm_sgnd sgnd tm vc pc +in Cin Cout +out isolation boundry vtm primary secondary ref 3312 sgnd voltage sense sgnd load bcm ser-in en +in Cin +out Cout enable/disable switch fuse isolation boundry primary secondary ser-out v in c i_bcm_elec source_rtn prm_sgnd c i_prm_elec r i_prm_damp l i_prm_flt r o_prm_damp l o_prm_flt c o_prm_cer c o_vtm_cer v ref enable/disable switch pri_out_a pri_com sec_in_a sec_out_c digital supervisor digital isolator vddb vdd tx rx pmbus sgnd t host c sec_com pmbus sgnd + C v ext pri_in_c sec_in_b ser-in pri_out_b ser-out nc sgnd sgnd sgnd ser-out ser-in prm enable trim share/ control node al ifb vc vt vaux ref/ ref_en +in Cin +out Cout tm vc pc +in Cin Cout +out adaptive loop temperature feedback vtm start up pulse prm_sgnd sgnd sgnd isolation boundry load_rtn vtm primary secondary bcm ser-in en +in Cin +out Cout enable/disable switch fuse isolation boundry primary secondary ser-out r i_prm_cer r trim_prm r al_prm prm_sgnd c i_bcm_elec source_rtn v in r i_prm_damp l i_prm_flt r o_prm_damp l o_prm_flt c o_prm_cer load v out c o_vtm_cer enable/disable switch pri_out_a pri_com sec_in_a sec_out_c digital supervisor digital isolator vddb vdd tx rx pmbus sgnd t host c sec_com pmbus sgnd + C v ext pri_in_c sec_in_b pri_out_b nc sgnd sgnd sgnd ser-out ser-in ser-in ser-out
bcm ? bus converter rev 1.3 vicorpower.com page 3 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 1 2 a b c d e d c b +in +out top view 6123 chip package a ser-in en +out -out -out -in ser-out pin configuration pin descriptions pin number signal name type function a1 +in input power positive input power terminal b1 ser-out output uart transmit pin; primary side referenced signals c1 en input enables and disables power supply; primary side referenced signals d1 ser-in input uart receive pin; primary side referenced signals e1 -in input power return negative input power terminal a?2, c?2 +out output power positive output power terminal b?2, d?2 -out output power return negative output power terminal
bcm ? bus converter rev 1.3 vicorpower.com page 4 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 absolute maximum ratings the absolute maximum ratings below are stress ratings only. operation at or beyond these maximum ratings can cause permanent da mage to the device. parameter comments min max unit +in to ?in -1 480 v v in slew rate (operational) 1000 v/ms isolation voltage, input to output dielectric test applied to 100% production units 4242 v +out to ?out -1 60 v ser-out to ?in -0.3 4.6 v en to ?in -0.3 5.5 v ser-in to ?in -0.3 4.6 v part ordering information device input voltage range package type output voltage x 10 temperature grade output power revision package size version bcm 400 y 500 x 1k8 a 3 1 bcm = bcm 400 = 260 to 410 v p = chip through hole 500 = 50 v t = -40 to 125c m = -55 to 125c 1k8 = 1,750 w a 3 = 6123 1 standard models all products shipped in jedec standard high profile (0.400? thick) trays (jedec publication 95, design guide 4.10). part number v in package type v out temperature power package size bcm 400 p 500 t 1k8 a31 260 to 410 v chip through hole 50 v 32.5 to 51.3 v -40c to 125c 1,750 w 6123 bcm 400 p 500 m 1k8 a31 260 to 410 v chip through hole 50 v 32.5 to 51.3 v -55c to 125c 1,750 w 6123
bcm ? bus converter rev 1.3 vicorpower.com page 5 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 electrical specifications specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40 c t internal 125 c (t-grade); all other specifications are at t internal = 25 oc unless otherwise noted. attribute symbol conditions / notes min typ max unit powertrain input voltage range, continuous v in _ dc 260 410 v input voltage range, transient v in _ trans full current or power supported, 50 ms max, 260 410 v 10% duty cycle max v in controller active v c_active v in voltage where c is initialized, 120 v (ie vaux = low, powertrain inactive) quiescent current i q disabled, en low, v in = 400 v 2 ma t internal 100oc 4 no load power dissipation p nl v in = 400 v, t internal = 25 oc 10 14 w v in = 400 v 6 21 v in = 260 v to 410 v, t internal = 25 oc 15 v in = 260 v to 410 v 22 inrush current peak i inr _ p v in = 410 v, c out = 100 f, 6 r load = 25% of full load current a t internal 100oc 12 dc input current i in _ dc at p out = 1750 w, t internal 100oc 4.5 a transformation ratio k k = v out /v in , at no load 1/8 v/ v output power (continuous) p out_dc 1750 w output power (pulsed) p out_pulse 10 ms pulse, 25% duty cycle, p total = % rated p out_dc 2000 w output current (continuous) i out_dc 35 a output current (pulsed) i out_pulse 10 ms pulse, 25% duty cycle, i total = % rated i out_dc 40 a v in = 400 v, i out = 35 a 96.9 97.4 efficiency (ambient) h amb v in = 260 v to 410 v, i out = 35 a 95.7 % v in = 400 v, i out = 17.50 a 97.5 98 efficiency (hot) h hot v in = 400 v, i out = 35 a, t internal = 100 c 96.3 96.8 % efficiency (over load range) h 20% 7 a < i out < 35 a, t internal 100oc 92 % r out _ cold v in = 400 v, i out = 35 a, t internal = -40 c 12 16 20 output resistance r out _ amb v in = 400 v, i out = 35 a 16 22.6 33 m r out _ hot v in = 400 v, i out = 35 a, t internal = 100 c 24 31 39 switching frequency f sw frequency of the output voltage ripple = 2x f sw 1.05 1.10 1.14 mhz c out = 0 f, i out = 35 a, v in = 400 v, 250 output voltage ripple v out _ pp 20 mhz bw mv t internal 100oc 350 input inductance (parasitic) l in _ par frequency 2.5 mhz (double switching frequency), 6.7 nh simulated lead model output inductance (parasitic) l out _ par frequency 2.5 mhz (double switching frequency), 1.3 nh simulated lead model input series inductance (internal) l in_int reduces the need for input decoupling 0.56 h inductance in bcm arrays effective input capacitance (internal) c in _ int effective value at 400 v in 0.37 f
bcm ? bus converter rev 1.3 vicorpower.com page 6 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 attribute symbol conditions / notes min typ max unit powertrain (cont.) effective output capacitance (internal) c out _ int effective value at 50 v out 25.6 f effective output capacitance (external) c out _ ext excessive capacitance may drive module into 0 100 f sc protection array maximum external output c out_aext c out_aext max = n * 0.5*c out_ext max capacitance powertrain protection startup into a persistent fault condition. 292.5 357.5 ms auto restart time t auto_restart non-latching fault detection given v in > v in_uvlo+, module will ignore attempts to re-enable during time off input overvoltage lockout threshold v in _ ovlo + 430 440 450 v input overvoltage recovery threshold v in _ ovlo - 420 430 440 v input overvoltage lockout hysteresis v in _ ovlo _ hyst 10 v overvoltage lockout response time t ovlo 10 s soft-start time t soft-start from powertrain active 1 ms fast current limit protection disabled during soft-start output overcurrent trip threshold i ocp 37.5 47 59 a overcurrent response time constant t ocp effective internal rc filter 3.6 ms short circuit protection trip threshold i scp 52 a short circuit protection response time t scp 1 s overtemperature shutdown threshold t otp temperature sensor located inside controller ic 125 oc powertrain supervisory limits input overvoltage lockout threshold v in_ovlo+ 420 436 450 v input overvoltage recovery threshold v in_ovlo- 405 426 440 v input overvoltage lockout hysteresis v in_ovlo_hyst 10 v overvoltage lockout response time t ovlo 100 s input undervoltage lockout threshold v in_uvlo- 200 226 250 v input undervoltage recovery threshold v in_uvlo+ 225 244 259 v input undervoltage lockout hysteresis v in_uvlo_hyst 15 v undervoltage lockout response time t uvlo 100 s from v in = v in_uvlo+ to powertrain active, undervoltage startup delay t uvlo+_delay en floating, (i.e one time startup delay from 20 ms application of v in to v out ) output overcurrent trip threshold i ocp 42.5 45 47.5 a overcurrent response time constant t ocp 2 ms overtemperature shutdown threshold t otp temperature sensor located inside controller ic 125 oc undertemperature shutdown threshold t utp temperature sensor located inside controller ic -45 oc undertemperature restart time t utp_restart startup into a persistent fault condition. non-latching 3 s fault detection given v in > v in_uvlo+ electrical specifications (cont.) specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40 c t internal 125 c (t-grade); all other specifications are at t internal = 25 oc unless otherwise noted.
bcm ? bus converter rev 1.3 vicorpower.com page 7 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 output current (a) input voltage (v) i (ave) i (pk), t < 10 ms 16 18 20 22 24 26 28 30 32 34 36 38 40 42 260 275 290 305 320 335 350 365 380 395 410 output power (w) input voltage (v) p (ave) p (pk), t < 10 ms 700 800 900 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 2100 260 275 290 305 320 335 350 365 380 395 410 figure 1 ? specified thermal operating area figure 2 ? specified electrical operating area using rated r out_hot 0 10 20 30 40 50 60 70 80 90 100 110 0 102030405060708090100110 output capacitance (% rated c out max) load current (% i out_avg ) output power (w) case temperature (c) one side cooling one side cooling and leads double sided cooling and leads 0 200 400 600 800 1000 1200 1400 1600 1800 2000 35 45 55 65 75 85 95 105 115 125 figure 3 ? specified primary start-up into load current and external capacitance
bcm ? bus converter rev 1.3 vicorpower.com page 8 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 reported characteristics specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40 c t internal 125 c (t-grade); all other specifications are at t internal = 25 oc unless otherwise noted. monitored telemetry ? the bcm communication version is not intended to be used without a digital supervisor. attribute digital supervisor pmbus tm read command accuracy (rated range) functional reporting range update rate reported units input voltage (88h) read_vin 5% ( ll - hl ) 130 v to 450 v 100 s v actual = v reported x 10 -1 input current (89h) read_iin 5% ( 10 - 133% of fl) - 0.85 a to 5.9 a 100 s i actual = i reported x 10 -3 output voltage [1] (8bh) read_vout 5% ( ll - hl ) 16.25 v to 56.25 v 100 s v actual = v reported x 10 -1 output current (8ch) read_iout 5% ( 10 - 133% of fl ) - 7 a to 47.5 a 100 s i actual = i reported x 10 -2 output resistance (d4h) read_rout 5% ( 50 - 100% of fl) 10 to 40 100 ms r actual = r reported x 10 -5 temperature [2] (8dh) read_temperature_1 7c ( full range) - 55oc to 130oc 100 ms t actual = t reported variable parameter ? factory setting of all below thresholds and warning limits are 100% of listed protection values. ? variables can be written only when module is disabled either en pulled low or v in < v in_uvlo- . ? module must remain in a disabled mode for 3 ms after any changes to the below variables allowing ample time to commit changes to eeprom. attribute digital supervisor pmbus tm command [3] conditions / notes accuracy (rated range) functional reporting range default value input / output overvoltage protection limit (55h) vin_ov_fault_limit v in_ovlo- is automatically 3% lower than this set point 5% ( ll - hl ) 130 v to 435 v 100% input / output overvoltage warning limit (57h) vin_ov_warn_limit 5% ( ll - hl ) 130 v to 435 v 100% input / output undervoltage protection limit (d7h) disable_faults can only be disabled to a preset default value 5% ( ll - hl ) 130 v or 260 v 100% input overcurrent protection limit (5bh) iin_oc_fault_limit 5% ( 10 - 133% of fl) 0 to 5.625 a 100% input overcurrent warning limit (5dh) iin_oc_warn_limit 5% ( 10 - 133% of fl) 0 to 5.625 a 100% overtemperature protection limit (4fh) ot_fault_limit 7c ( full range) 0 to 125c 100% overtemperature warning limit (51h) ot_warn_limit 7c ( full range) 0 to 125c 100% turn on delay (60h) ton_delay additional time delay to the undervoltage startup delay 50 s 0 to 100 ms 0 ms [3] refer to digital supervisor datasheet for complete list of supported commands. [1] default read output voltage returned when unit is disabled = -300 v. [2] default read temperature returned when unit is disabled = -273c.
bcm ? bus converter rev 1.3 vicorpower.com page 9 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 signal characteristics specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40 c t internal 125 c (t-grade); all other specifications are at t internal = 25 oc unless otherwise noted. uart ser-in / ser-out pins ? universal asynchronous receiver/transmitter (uart) pins. ? the bcm communication version is not intended to be used without a digital supervisor. ? isolated i 2 c communication and telemetry is available when using vicor digital isolator and vicor digital supervisor. please see specific product data sheet for more details. ? uart ser-in pin is internally pulled high using a 1.5 k to 3.3 v. signal type state attribute symbol conditions / notes min typ max unit general i/o regular operation baud rate br uart rate 750 kbit/s digital input ser-in pin ser-in input voltage range v ser-in_ih 2.3 v v ser-in_il 1 v ser-in rise time t ser-in_rise 10% to 90% 400 ns ser-in fall time t ser-in_fall 10% to 90% 25 ns ser-in r pullup r ser-in_plp pull up to 3.3 v 1.5 k ser-in external capacitance c ser-in_ext 400 pf digital output ser-out pin ser-out output voltage range v ser-out_oh 0 ma i oh -4 ma 2.8 v v ser-out_ol 0 ma i ol 4 ma 0.5 v ser-out rise time t ser-out_rise 10% to 90% 55 ns ser-out fall time t ser-out_fall 10% to 90% 45 ns ser-out source current i ser-out v ser-out = 2.8 v 6 ma ser-out output impedance z ser-out 120 enable / disable control ? the en pin is a standard analog i/o configured as an input to an internal c. ? it is internally pulled high to 3.3 v. ? when held low the bcm internal bias will be disabled and the powertrain will be inactive. ? in an array of bcms, en pins should be interconnected to synchronize startup and permit startup into full load conditions. ? enable / disable command will have no effect if the en pin is disabled. signal type state attribute symbol conditions / notes min typ max unit analog input startup en to powertrain active time t en_start v in > v in_uvlo+ , en held low both conditions satisfied for t > t uvlo+_delay 250 s regular operation en voltage threshold v enable 2.3 v en resistance (internal) r en_int internal pull up resistor 1.5 k en disable threshold v en_disable_th 1 v
bcm ? bus converter rev 1.3 vicorpower.com page 10 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 bcm module timing diagram en +in bidir input v out i np u t v o l ta g e turn- o n o u tp ut tu rn -o n input over volta g e inp u t r es tar t enable pulled low ena b l e p u lled h i g h s h o rt circ u i t ev ent inp u t voltage tu r n- o ff output e n & ser-in i n terna l pu l l -u p c initial iz e v in_ovlo- v in_ovlo+ v in_uvlo+ v c v nom v in_uvlo- t scp t uvlo+_delay t auto-restart t wait t enable_off startup over voltage enable control over current shutdown
bcm ? bus converter rev 1.3 vicorpower.com page 11 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 fault sequence en high powertrain stopped v c < v in < v in_uvlo+ v in > v in_uvlo+ t uvlo+_delay expired one time delay initial startup fault auto- recovery enable falling edge, or otp detected input ovlo or uvlo, output ocp, or utp detected enable falling edge, or otp detected input ovlo or uvlo, output ocp, or utp detected short circuit detected application of v in sustained operation en high powertrain active startup sequence en high powertrain stopped standby sequence en high powertrain stopped high level functional state diagram conditions that cause state transitions are shown along arrows. sub-sequence activities listed inside the state bubbles.
bcm ? bus converter rev 1.3 vicorpower.com page 12 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 application characteristics product is mounted and temperature controlled via top side cold plate, unless otherwise noted. see associated figures for gener al trend data. power dissipation (w) input voltage (v) - 40c 25c 80c t top surface case : 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 260 275 290 305 320 335 350 365 380 395 410 case temperature (oc) 260 v 400 v 410 v full load efficiency (%) v in : 95.5 95.8 96.0 96.3 96.5 96.8 97.0 97.3 97.5 97.8 98.0 -40 -20 0 20 40 60 80 100 efficiency (%) power dissipation (w) load current (a) 260 v 400 v 410 v v in : 0 8 16 24 32 40 48 56 64 72 80 88 88 89 90 91 92 93 94 95 96 97 98 99 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 p d figure 4 ? no load power dissipation vs. v in figure 5 ? full load efficiency vs. temperature; v in figure 6 ? efficiency and power dissipation at t case = -40 c efficiency (%) power dissipation (w) load current (a) 260 v 400 v 410 v v in : 0 8 16 24 32 40 48 56 64 72 90 91 92 93 94 95 96 97 98 99 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 p d efficiency (%) power dissipation (w) load current (a) 260 v 400 v 410 v v in : 0 8 16 24 32 40 48 56 64 72 90 91 92 93 94 95 96 97 98 99 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 p d figure 7 ? efficiency and power dissipation at t case = 25 c r out (m) case temperature (c) 35 a except 80c i out = 24 a i out : 0 10 20 30 40 50 -40 -20 0 20 40 60 80 100 figure 8 ? efficiency and power dissipation at t case = 80 c figure 9 ? r out vs. temperature; nominal v in
bcm ? bus converter rev 1.3 vicorpower.com page 13 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 figure 12 ? 0 a? 35 a transient response: c in = 2.2 f, no external c out figure 11 ? full load ripple, 2.2 f c in ; no external c out . board mounted module, scope setting : 20 mhz analog bw voltage ripple (mv pk-pk ) load current (a) 400 v v in : 0 50 100 150 200 250 300 0.0 3.5 7.0 10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0 figure 10 ? v ripple vs. i out ; no external c out . board mounted module, scope setting : 20 mhz analog bw figure 13 ? 35 a ? 0 a transient response: c in = 2.2 f, no external c out figure 14 ? start up from application of v in = 400 v, 50% i out , 100% c out figure 15 ? start up from application of en with pre-applied v in = 400 v, 50% i out , 100% c out
bcm ? bus converter rev 1.3 vicorpower.com page 14 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 general characteristics specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40 c t internal 125 c (t-grade); all other specifications are at t internal = 25 oc unless otherwise noted. human body model, "esda / jedec jds-001-2012" class i-c (1kv to < 2 kv) charge device model, "jesd 22-c101-e" class ii (200v to < 500v) attribute symbol conditions / notes min typ max unit mechanical length l 62.96 / [2.479] 63.34 / [2.494] 63.72 / [2.509] mm / [in] width w 22.67 / [0.893] 22.80 / [0.898] 22.93 / [0.903] mm / [in] height h 7.21 / [0.284] 7.26 / [0.286] 7.31 / [0.288] mm / [in] volume vol without heatsink 10.48 / [0.640] cm 3 / [in 3 ] weight w 41 / [1.45] g / [oz] nickel 0.51 2.03 lead finish palladium 0.02 0.15 m gold 0.003 0.051 thermal operating temperature t internal bcm400p500t1k8a31 (t-grade) -40 125 c BCM400P500M1K8A31 (m-grade) -55 125 c thermal resistance top side f int-top estimated thermal resistance to 1.33 c/w maximum temperature internal component from isothermal top thermal resistance leads f int-leads estimated thermal resistance to 5.64 c/w maximum temperature internal component from isothermal leads thermal resistance bottom side f int-bottom estimated thermal resistance to 1.29 c/w maximum temperature internal component from isothermal bottom thermal capacity 34 ws /c assembly storage temperature t st bcm400p500t1k8a31 (t-grade) -55 125 c BCM400P500M1K8A31 (m-grade) -65 125 c esd hbm esd withstand esd cdm
bcm ? bus converter rev 1.3 vicorpower.com page 15 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 telcordia issue 2 - method i case iii; 25c ground benign, controlled mil-hdbk-217plus parts count - 25c ground benign, stationary, indoors / computer general characteristics (cont.) specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of -40 c t internal 125 c (t-grade); all other specifications are at t internal = 25 oc unless otherwise noted. [1] product is not intended for reflow solder attach. attribute symbol conditions / notes min typ max unit soldering [1] peak temperature top case 135 c safety in to out 4,242 isolation voltage v hipot in to case 2,121 v dc out to case 2,121 isolation capacitance c in _ out unpowered unit 620 780 940 pf isolation resistance r in _ out at 500 vdc 10 m mtbf 3.53 mhrs 3.90 mhrs ctuvus "en 60950-1" agency approvals / standards curus "ul 60950-1" ce marked for low voltage directive and rohs recast directive, as applicable
bcm ? bus converter rev 1.3 vicorpower.com page 16 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 c01 c02 q01 c03 c04 c05 c06 c07 c08 c09 c10 l01 current flow detection + forward i in sense i in startup circuit +v in /4 sepic en cr c out +v out -v out +v in -v in en ser-out ser-out en ser-in differential current sensing full-bridge synchronous rectification primary stage fast current limit analog controller digital controller sepic cntrl on/off temperature sensor q02 q03 q04 q05 q06 q07 q08 lr secondary stage q11 q12 q09 q10 +v cc -v cc 3.3v linear regulator +v in /4 ( +v in /4 ) - x slow current limit modulator primary and secondary gate drive transformer 1.5 k 1.5 k soft-start ser-in over-temp under-temp over voltage undervoltage startup / re-start delay output overcurrent bcm module block diagram
bcm ? bus converter rev 1.3 vicorpower.com page 17 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 system diagram the bcm400y500x1k8a31 bus converter provides accurate telemetry monitoring and reporting, threshold and warning limits adjustment, in addition to corresponding status flags. the bcm internal c is referenced to primary ground. the digital isolator allows uart communication interface with the host dig ital supervisor at typical speed of 750 khz across the isolation barrier. one of the advantages of the digital isolator is its low p ower consumption. each transmission channel is able to draw its internal bias circuitry directly from the input signal being transmi tted to the output with minimal to no signal distortion. the digital supervisor provides the host system c with access to an array of up to 4 bcms. this array is constantly polled for status by the digital supervisor. direct communication to individual bcm is enabled by a page command. for example, the page (0x00) pr ior to a telemetry inquiry points to the digital supervisor data and pages (0x01 ? 0x04) prior to a telemetry inquiry points to the array of bcms connected data. the digital supervisor constantly polls the bcm data through the uart interface. the digital supervisor enables the pmbus tm compatible host interface with an operating bus speed of up to 400 khz. the digital supervisor follows the pmbus command structure and specification. please refer to the digital supervisor data sheet for more details. ser-out 1 d x t n i - r e s rxd1 rxd4 rxd3 rxd2 rxd1 txd4 txd3 txd2 txd1 nc nc saddr c n c n sgnd sda nc nc scl vddb vdd nc nc nc sstop vdd 10 k 10 k 5v ext digital isolator d44tl1a0 host c pmbus sda scl cp d q sgnd d flip-flop vcc sd rd q scl sda sgnd vdd 3 k 3 k pri-out-a pri-out-b pri-in-c pri-com sec-in-a sec-in-b sec-out-c sec-com bcm en 74lvc1g74dc fdg6318p en control 3.3v, at least 20ma when using 4xdiso ref to digital isolator datasheet for more details r2 r1 -out bcm -in bcm
bcm ? bus converter rev 1.3 vicorpower.com page 18 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 the sine amplitude converter (sac?) uses a high frequency resonant tank to move energy from input to output. (the resonant tank is formed by cr and leakage inductance lr in the power transformer windings as shown in the bcm module block diagram). the resonant lc tank, operated at high frequency, is amplitude modulated as a function of input voltage and output current. a small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving high power density. the bcm400y500x1k8a31 sac can be simpli?ed into the preceeding model. at no load: v out = v in ? k (1) k represents the turns ratio of the sac. rearranging eq (1): k= v out (2) v in in the presence of load, v out is represented by: v out = v in ? k C i out ? r out (3) and i out is represented by: i out = i in Ci q (4) k r out represents the impedance of the sac, and is a function of the r dson of the input and output mosfets and the winding resistance of the power transformer. i q represents the quiescent current of the sac control, gate drive circuitry, and core losses. the use of dc voltage transformation provides additional interesting attributes. assuming that r out = 0 and i q = 0 a, eq. (3) now becomes eq. (1) and is essentially load independent, resistor r is now placed in series with v in . the relationship between v in and v out becomes: v out = (v in Ci in ? r in ) ? k (5) substituting the simpli?ed version of eq. (4) (i q is assumed = 0 a) into eq. (5) yields: v out = v in ? k C i out ? r in ? k 2 (6) + + v out c out v in v?i k + + c in i out r c out i q r out r c in 25 ma 1/8 ? i out 1/8 ? v in r cin 21.5 m 1.76 nh 138 m 25.6 f i q l in_leads = 6.7 nh i out v in r sac k = 1/32 vin vout + ? v in v out r in sac? k = 1/8 figure 17 ? k = 1/8 sine amplitude converter with series input resistor figure 16 ? bcm module ac model c out l out_leads = 1.3 nh l in_int = 0.56 h c in 0.37 f 22.6 m r out r cout 510 v out sine amplitude converter? point of load conversion
bcm ? bus converter rev 1.3 vicorpower.com page 19 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 this is similar in form to eq. (3), where r out is used to represent the characteristic impedance of the sac?. however, in this case a real r on the input side of the sac is effectively scaled by k 2 with respect to the output. assuming tha tr=1,the effective r as seen from the secondary side is 15.6 m, wit hk= 1/8 . a similar exercise should be performed with the addition of a capacitor or shunt impedance at the input to the sac. a switch in series with v in is added to the circuit. this is depicted in figure 18. a change in v in with the switch closed would result in a change in capacitor current according to the following equation: i c (t) = c dv in (7) dt assume that with the capacitor charged to v in , the switch is opened and the capacitor is discharged through the idealized sac. in this case, i c =i out ? k (8) substituting eq. (1) and (8) into eq. (7) reveals: i out = c ? dv out (9) k 2 dt the equation in terms of the output has yielded a k 2 scaling factor for c, speci?ed in the denominator of the equation. a k factor less than unity results in an effectively larger capacitance on the output when expressed in terms of the input. with a k = 1/8 as shown in figure 18, c = 1 f would appear as c = 64 f when viewed from the output. low impedance is a key requirement for powering a high-current, low- voltage load efficiently. a switching regulation stage should have minimal impedance while simultaneously providing appropriate ?ltering for any switched current. the use of a sac between the regulation stage and the point of load provides a dual bene?t of scaling down series impedance leading back to the source and scaling up shunt capacitance or energy storage as a function of its k factor squared. however, the bene?ts are not useful if the series impedance of the sac is too high. the impedance of the sac must be low, i.e. well beyond the crossover frequency of the system. a solution for keeping the impedance of the sac low involves switching at a high frequency. this enables small magnetic components because magnetizing currents remain low. small magnetics mean small path lengths for turns. use of low loss core material at high frequencies also reduces core losses. the two main terms of power loss in the bcm module are: n no load power dissipation (p nl ): de?ned as the power used to power up the module with an enabled powertrain at no load. n resistive loss (r out ): refers to the power loss across the bcm? module modeled as pure resistive impedance. p dissipated = p nl + p r out (10) therefore, p out = p in Cp dissipated = p in Cp nl Cp r out (11) the above relations can be combined to calculate the overall module efficiency: h = p out = p in Cp nl Cp r out (12) p in p in = v in ? i in Cp nl C(i out ) 2 ? r out v in ? i in =1 C ( p nl + (i out ) 2 ? r out ) v in ? i in c s sac k = 1/32 vin vout + ? v in v out c sac? k = 1/8 figure 18 ? sine amplitude converter with input capacitor s
bcm ? bus converter rev 1.3 vicorpower.com page 20 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 input and output filter design a major advantage of sac? systems versus conventional pwm converters is that the transformer based sac does not require external ?ltering to function properly. the resonant lc tank, operated at extreme high frequency, is amplitude modulated as a function of input voltage and output current and efficiently transfers charge through the isolation transformer. a small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving power density. this paradigm shift requires system design to carefully evaluate external ?lters in order to: n guarantee low source impedance: to take full advantage of the bcm modules dynamic response, the impedance presented to its input terminals must be low from dc to approximately 5 mhz. the connection of the bus converter module to its power source should be implemented with minimal distribution inductance. if the interconnect inductance exceeds 100 nh, the input should be bypassed with a rc damper to retain low source impedance and stable operation. with an interconnect inductance of 200 nh, the rc damper may be as high as 1 f in series with 0.3 . a single electrolytic or equivalent low-q capacitor may be used in place of the series rc bypass. n further reduce input and/or output voltage ripple without sacri?cing dynamic response: given the wide bandwidth of the module, the source response is generally the limiting factor in the overall system response. anomalies in the response of the source will appear at the output of the module multiplied by its k factor. n protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and induce stresses: the module input/output voltage ranges shall not be exceeded. an internal overvoltage lockout function prevents operation outside of the normal operating input range. even when disabled, the powertrain is exposed to the applied voltage and power mosfets must withstand it. total load capacitance at the output of the bcm module shall not exceed the speci?ed maximum. owing to the wide bandwidth and low output impedance of the module, low-frequency bypass capacitance and signi?cant energy storage may be more densely and efficiently provided by adding capacitance at the input of the module. at frequencies <500 khz the module appears as an impedance of r out between the source and load. within this frequency range, capacitance at the input appears as effective capacitance on the output per the relationship de?ned in eq. (13). c out = c in (13) k 2 this enables a reduction in the size and number of capacitors used in a typical system. thermal considerations the chip package provides a high degree of ?exibility in that it presents three pathways to remove heat from internal power dissipating components. heat may be removed from the top surface, the bottom surface and the leads. the extent to which these three surfaces are cooled is a key component for determining the maximum power that is available from a chip, as can be seen from figure 1. since the chip has a maximum internal temperature rating, it is necessary to estimate this internal temperature based on a real thermal solution. given that there are three pathways to remove heat from the chip, it is helpful to simplify the thermal solution into a roughly equivalent circuit where power dissipation is modeled as a current source, isothermal surface temperatures are represented as voltage sources and the thermal resistances are represented as resistors. figure 19 shows the thermal circuit for a vi chip? bcm module 6123 in an application where the top, bottom, and leads are cooled. in this case, the bcm power dissipation is pd total and the three surface temperatures are represented as t case_top , t case_bottom , and t leads . this thermal system can now be very easily analyzed using a spice simulator with simple resistors, voltage sources, and a current source. the results of the simulation would provide an estimate of heat ?ow through the various pathways as well as internal temperature. alternatively, equations can be written around this circuit and analyzed algebraically: t int C pd 1 ? 1.24 = t case_top t int C pd 2 ? 1.24 = t case_bottom t int C pd 3 ? 7 = t leads pd total = pd 1 + pd 2 + pd 3 where t int represents the internal temperature and pd 1 , pd 2 , and pd 3 represent the heat ?ow through the top side, bottom side, and leads respectively. + ? + ? + ? max internal temp t case_bottom (c) t leads (c) t case_top (c) power dissipation (w) thermal resistance top thermal resistance bottom thermal resistance leads + ? + ? max internal temp t case_bottom (c) t leads (c) t case_top (c) power dissipation (w) thermal resistance top thermal resistance bottom thermal resistance leads figure 19 ? double side cooling and leads thermal model figure 20 ? one side cooling and leads thermal model 1.33 c / w 1.29 c / w 5.64 c / w 1.33 c / w 1.29 c / w 5.64 c / w
bcm ? bus converter rev 1.3 vicorpower.com page 21 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 figure 20 shows a scenario where there is no bottom side cooling. in this case, the heat ?ow path to the bottom is left open and the equations now simplify to: t int C pd 1 ? 1.24 = t case_top t int C pd 3 ? 7 = t leads pd total = pd 1 + pd 3 figure 21 shows a scenario where there is no bottom side and leads cooling. in this case, the heat ?ow path to the bottom is left open and the equations now simplify to: t int C pd 1 ? 1.24 = t case_top pd total = pd 1 please note that vicor has a suite of online tools, including a simulator and thermal estimator which greatly simplify the task of determining whether or not a bcm thermal con?guration is valid for a given condition. these tools can be found at: http://www.vicorpower.com/powerbench . current sharing the performance of the sac? topology is based on efficient transfer of energy through a transformer without the need of closed loop control. for this reason, the transfer characteristic can be approximated by an ideal transformer with a positive temperature coefficient series resistance. this type of characteristic is close to the impedance characteristic of a dc power distribution system both in dynamic (ac) behavior and for steady state (dc) operation. when multiple bcm modules of a given part number are connected in an array they will inherently share the load current according to the equivalent impedance divider that the system implements from the power source to the point of load. some general recommendations to achieve matched array impedances include: n dedicate common copper planes within the pcb to deliver and return the current to the modules. n provide as symmetric a pcb layout as possible among modules n an input ?lter is required for an array of bcms in order to prevent circulating currents. for further details see an:016 using bcm bus converters in high power arrays . fuse selection in order to provide ?exibility in con?guring power systems vi chip? modules are not internally fused. input line fusing of vi chip products is recommended at system level to provide thermal protection in case of catastrophic failure. the fuse shall be selected by closely matching system requirements with the following characteristics: n current rating (usually greater than maximum current of bcm module) n maximum voltage rating (usually greater than the maximum possible input voltage) n ambient temperature n nominal melting i 2 t n recommend fuse: 5 a bussmann pc-tron reverse operation bcm modules are capable of reverse power operation. once the unit is started, energy will be transferred from secondary back to the primary whenever the secondary voltage exceeds v in ? k. the module will continue operation in this fashion for as long as no faults occur. the bcm400y500x1k8a31 has not been quali?ed for continuous operation in a reverse power condition. furthermore fault protections which help protect the module in forward operation will not fully protect the module in reverse operation. transient operation in reverse is expected in cases where there is signi?cant energy storage on the output and transient voltages appear on the input. transient reverse power operation of less than 10 ms, 10% duty cycle is permitted and has been quali?ed to cover these cases. bcm ? 1 r 0_1 z in_eq1 z out_eq1 z out_eq2 vout z out_eqn z in_eq2 z in_eqn r 0_2 r 0_n bcm ? 2 bcm ? n load dc vin + figure 22 ? bcm module array + ? max internal temp t case_bottom (c) t leads (c) t case_top (c) power dissipation (w) thermal resistance top thermal resistance bottom thermal resistance leads figure 21 ? one side cooling thermal model 1.33 c / w 1.29 c / w 5.64 c / w
bcm ? bus converter rev 1.3 vicorpower.com page 22 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 bcm module through hole package mechanical drawing and recommended land pattern 11.40 .449 22.80.13 .898.005 31.67 1.247 63.34.38 2.494.015 0 0 0 0 top view (component side) 1.52 .060 (2) pl. 1.02 .040 (3) pl. 11.43 .450 1.52 .060 (4) pl. 0 30.91 1.217 30.91 1.217 0 2.75 .108 8.25 .325 2.75 .108 8.25 .325 8.00 .315 1.38 .054 1.38 .054 4.13 .162 8.00 .315 0 0 bottom view .41 .016 (9) pl. 4.17 .164 (9) pl. 7.26.05 .286.002 seating . plane .05 [.002] 2.03 .080 plated thru .25 [.010] annular ring (2) pl. 1.52 .060 plated thru .25 [.010] annular ring (3) pl. 2.03 .080 plated thru .38 [.015] annular ring (4) pl. 0 2.75.08 .108.003 8.25.08 .325.003 2.75.08 .108.003 8.25.08 .325.003 8.00.08 .315.003 4.13.08 .162.003 1.38.08 .054.003 1.38.08 .054.003 8.00.08 .315.003 0 30.91.08 1.217.003 30.91.08 1.217.003 0 0 +in ser-out en ser-in -in +out +out -out -out recommended hole pattern (component side) notes: 1- rohs compliant per cst-0001 latest revision. 2- unless specified otherwise, dimesions are mm / [inch].
bcm ? bus converter rev 1.3 vicorpower.com page 23 of 23 05/2015 800 927.9474 bcm400y500x1k8a31 vicor?s comprehensive line of power solutions includes high density ac-dc and dc-dc modules and accessory components, fully configurable ac-dc and dc-dc power supplies, and complete custom power systems. information furnished by vicor is believed to be accurate and reliable. however, no responsibility is assumed by vicor for its use. vicor makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. vicor reserves the right to make changes to any products, specifications, and product descriptions at any time without notice. information published by vicor h as been checked and is believed to be accurate at the time it was printed; however, vicor assumes no responsibility for inaccuracies. testing and other quality controls are used to the extent vicor deems necessary to support vicor?s product warranty. except where mandated by government requirements , testing of all parameters of each product is not necessarily performed. specifications are subject to change without notice. vicor?s standard terms and conditions all sales are subject to vicor?s standard terms and conditions of sale, which are available on vicor?s webpage or upon request. product warranty in vicor?s standard terms and conditions of sale, vicor warrants that its products are free from non-conformity to its standard specifications (the ?express limited warranty?). this warranty is extended only to the original buyer for the period expiring two (2) years after t he date of shipment and is not transferable. unless otherwise expressly stated in a written sales agreement signed by a duly authorized vicor signatory, vicor disclaims all representations, liabilities, and warranties of any kind (whether arising by implication or by operation of law) with respect to the products, including, without limitation, any warranties or representations as to merchantability, fitness for particular purpose, infringement of any patent, copyright, or other intellectual property right, or any other matter. this warranty does not extend to products subjected to misuse, accident, or improper application, maintenance, or storage. vico r shall not be liable for collateral or consequential damage. vicor disclaims any and all liability arising out of the application or use of any pro duct or circuit and assumes no liability for applications assistance or buyer product design. buyers are responsible for their products and applications us ing vicor products and components. prior to using or distributing any products that include vicor components, buyers should provide adequate design, testing and operating safeguards. vicor will repair or replace defective products in accordance with its own best judgment. for service under this warranty, the buyer must contact vicor to obtain a return material authorization (rma) number and shipping instructions. products returned without prior author ization will be returned to the buyer. the buyer will pay all charges incurred in returning the product to the factory. vicor will pay all re shipment charges if the product was defective within the terms of this warranty. life support policy vicor?s products are not authorized for use as critical components in life support devices or systems without the express prior written approval of the chief executive officer and general counsel of vicor corporation. as used herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and wh ose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a s ignificant injury to the user. a critical component is any component in a life support device or system whose failure to perform can be reasonably expec ted to cause the failure of the life support device or system or to affect its safety or effectiveness. per vicor terms and conditions of sale, the user of vicor products and components in life support applications assumes all risks of such use and indemnifies vicor against all liability and damag es. intellectual property notice vicor and its subsidiaries own intellectual property (including issued u.s. and foreign patents and pending patent applications ) relating to the products described in this data sheet. no license, whether express, implied, or arising by estoppel or otherwise, to any intel lectual property rights is granted by this document. interested parties should contact vicor's intellectual property department. the products described on this data sheet are protected by the following u.s. patents numbers: 5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,145,186; 7,166,898; 7,187, 263; 7,202,646; 7,361,844; d496,906; d505,114; d506,438; d509,472; and for use under 6,975,098 and 6,984,965. vicor corporation 25 frontage road andover, ma, usa 01810 tel: 800-735-6200 fax: 978-475-6715 email customer service: custserv@vicorpower.com technical support: apps@vicorpower.com

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